1. Field of the Invention
The present invention relates to a transconductance cell having improved linearity.
2. Description of the Prior Art
Transconductance cells have been used for various linear circuit applications known in the art. For example, a continuous-time integrating filter has been implemented with this technique; see J. M. Khoury "Design of a 15-MHz CMOS Continuous-Time Filter with On-Chip Tuning", IEEE Journal of Solid-State Circuits, vol. 26, no. 12, pp. 1988-1997, December 1991. In particular, FIG. 5 of that article shows one implementation of a transconductance-capacitor integrator. A cell comprising a pair of fully-balanced transconductance input stages is illustrated herein in FIG. 1. In the first input stage (A), the input signals V.sub.AP and V.sub.AN are applied to the gates of transistors 107 and 109, respectively. The current sources 100 and 101 provide a relatively constant current (I) through transistors 107 and 109, respectively. The transistor 108, connected between the sources of transistors 107 and 109, operates in the resistive (i.e., "triode") region of its characteristic curve. The basic transconductance (g.sub.m) of this first input stage is set by the transconductance of transistor 108. In the fully-balanced structure, the resulting currents I.sub.P and I.sub. N supplied to the output stage 106 may be calculated from: EQU I.sub.P -I.sub.N =-g.sub.m .times.(V.sub.AP -V.sub.AN).
I.sub.P and I.sub.N consist of two parts from each input pair: From the input pair AP and AN, the current can be considered to be the bias current I with the current through transistor 108 being subtracted from the AP side and added to the AN side. The use of more than one such transconductance transistor is possible, as in the above-noted article.
The currents I.sub.P and I.sub.N are supplied to the output stage 106, comprising current sources 104 and 105, and transistors 113 . . . 116 in the illustrative case. The output stage (106) is biased with voltages BN1 and BN2. The output signals V.sub.ON and V.sub.OP are produced by the output stage. In operation, it can be seen that a more positive voltage on the gate of transistor 107 (more positive V.sub.AP) causes I.sub.P to decrease and I.sub.N to increase, so that V.sub.OP increases and V.sub.ON decreases. A more positive V.sub.AN causes V.sub.OP to decrease and V.sub.ON to increase. A similar effect occurs with changes in V.sub.BP and V.sub.BN applied to the second input stage (B), comprising current sources 102 and 103 and transistors 110, 111 and 112. In the embodiment shown, the input stages are implemented with p-channel transistors, and the output stage with n-channel transistors. However, other combinations of transistor types are possible, with corresponding changes to the output voltages as a function of the input voltages.
In typical applications, the signals V.sub.AP and V.sub.AN may be considered the input signals for the circuit of FIG. 1, which typically implements an integrator when coupled to capacitors 23 and 24 in FIG. 2. The signals BP and BN are the feedback signals, which are out-of-phase with respect to the AP and AN signals, respectively, in the filter's pass band. If the transconductances of the two input stages are equal, then V.sub.AP and V.sub.BN are approximately the same amplitude and phase. Similarly, V.sub.AN and V.sub.BP are approximately the same amplitude and phase. For example, referring to FIG. 2, a prior-art "biquadratic" low-pass filter is illustrated, wherein each of the filter cells 20 and 21 comprise the circuitry shown in FIG. 1. That is, each cell includes first and second transconductance input stages and an output stage. In addition, capacitors 22, 23, 24 and 25 provide for integration in the illustrative case of a low-pass filter. Note that the input signal V.sub.in is supplied to the inputs AP and AN of cell 20. Similarly, the outputs OP and ON of cell 20 are supplied to the AP and AN inputs of cell 21. The BP inputs of both cells 20 and 21 are derived from the ON output of cell 21, which is out of phase with respect to the AP inputs in the passband of the filter. The BN inputs of both cells 20 and 21 are derived from the OP output of cell 21, which is out of phase with respect to the BP inputs in the passband of the filter. Hence, the A inputs in both cells 20 and 21 are approximately balanced, and out of phase with the B inputs.
For low distortion, the circuits of FIGS. 1 and 2 require that the signal input voltage to each cell (V.sub.AP -V.sub.AN) be less than a given value. On the other hand, the signal voltage should be sufficiently high to give adequate signal-to-noise performance. It is desirable in most cases to extend the difference between the minimum and maximum acceptable signal levels; that is, to extend the dynamic range of the circuit. This may be accomplished by extending the linearity of the circuit response so as to cover a wider signal range.